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WM8232 데이터시트(PDF) 37 Page - Cirrus Logic |
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WM8232 데이터시트(HTML) 37 Page - Cirrus Logic |
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37 / 141 page ![]() WM8232 Rev 4.6 37 TG PULSE The WM8232 can generate 8 TG pulses internally (PO0 – PO7). These pulses are generated by the toggle point setting registers (TP*) and polarity setting registers (POL*_PO*). WM8232 provided up to 32 toggle point by using TP0 to TP31. PO0-PO7 signals can be assigned to CLK2-CLK11 by SEL_PCK* and SEL_CLK* register. TRIGGER DATA The WM8232 can implement trigger data in LVDS output.(S0,S1,S2,S3 and S4) This can be selected by two methods. One is the FLAGPIX register which can be set one pixel for each line. The other is to apply a PO* pulse. Figure 24 shows the trigger data implementation timing. CHANNEL ID Also WM8232 can implement channel identification data instead of trigger data. Table 13 shows the matrix of input channel and channel ID. ID[1] ID[0] IN1 0 1 IN2 1 0 IN3 1 1 Table 13 Channel ID Channel ID can be assigned to flag data (S0, S1, S2, S3 or S4). The following is the example of channel ID assignment. Example: Assigned channel ID to flag data as ID[1]=S2, ID[0]=S3. If output data is as follows, channel ID will be IN1. (i.e. ID[1]=S2=0, ID[0]=S3=1) A D5 S0 S1 S2 IN1[0] IN1[1] IN1[2] IN1[3] D4 IN1[4] IN1[5] IN1[6] IN1[7] IN1[8] S3 D3 S4 IN2[0] IN2[1] IN2[2] IN2[3] IN2[4] IN2[5] D2 IN2[6] IN2[7] IN2[8] IN2[9] IN3[0] IN3[1] IN3[2] D1 IN3[3] IN3[4] IN3[5] IN3[6] IN3[7] IN3[8] IN3[9] DCLK H H L L L H H |
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