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WM8232 데이터시트(PDF) 24 Page - Cirrus Logic |
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WM8232 데이터시트(HTML) 24 Page - Cirrus Logic |
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24 / 141 page ![]() WM8232 24 Rev 4.6 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R28 (1Ch) PLL divider control 1 6:4 PLL_EXDIV_ SEL[2:0] 001 Select EX DIV ratio. Need to set according to input frequency. See Table 4. 000 = 1 001 = 2 010 = 4 011 = 8 100 = 16 101 to 111 = reserved. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R128 (80h) DLL config 1 5:4 DLGAIN[1:0] 01 gain control of DLL delay line Need to set according to input frequency. See Table 4. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R129 (81h) DLL config 2 5:4 LVDLGAIN[1:0] 01 gain control of LVDS DLL delay line Need to set according to input frequency. See Table 4. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R432 (1B0h) User access control 0 USER_KEY 0 0 = User access disabled 1 = User access enabled REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R436 (1B4h) LDO2 control 4:0 LDO2 VSEL 1_0000 1_0000 = 1.8V 1_0010 = 2.0V Notes: 1. To change the LDO2 control, the USER_KEY bit must be set to ‘1’. 2. If it’s not required to change this register, it must be set as default. |
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