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WM8602SEDS/V 데이터시트(PDF) 35 Page - Wolfson Microelectronics plc

부품명 WM8602SEDS/V
상세설명  2.1 CHANNEL PWM CONTROLLER
PDF  46 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
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WM8602
w
PP Rev 1.5 May 2004
35
PCM TO PWM CONVERTER
The PCM to PWM converter converters the Pulse-Code Modulated (PCM) signal into a highly linear
Pulse-Width Modulated (PWM) signal. Table 44 defines the Pulse Repetition Frequency, (PRF),
output clock rate (OBCLK) and minimum pulse width for each supported sampling frequency.
t
PWMP
t
PWMP
t
PWMM
t
PWMM
t
OBCLK
Figure 22 PCM to PWM Converter
The PRF Frequency (TPWMP) of the Sub-woofer channel is half of the frequency defined in Table 44
in order to reduce power dissipation in the output stage.
PRF
(1/TPWMP)
Main Channel
SUB
OUTPUT BITCLOCK
FREQUENCY
(1/TOBCLK)
MINIMUM PULSE
WIDTH (TPWMM)
SAMPLING
FREQUENCY
[kHz]
[kHz]
[MHz]
[ns]
32kHz
384
192
98.304
122
44.1kHz
352.8
176.4
90.3168
133
48kHz
384
192
98.304
122
88.2kHz
352.8
176.4
90.3168
133
96kHz
384
192
98.304
122
176.4kHz
352.8
176.4
90.3168
133
192kHz
384
192
98.304
122
Table 44 Output Bitclock Frequency
Notes:
1.
The correct Output Bitclock Frequency (TOBCLK) is generated by the built-in PLL of the WM8602
device. The incoming clock must meet the jitter specification defined in Table 3.
OUTPUT PHASE
The Phase control word determines whether the output of each channel is non-inverted or inverted.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Bit
Channel
Phase
0
L
1 = invert
1
R
1 = invert
R26 (1Ah)
Output Phase
6:0
PH[6:0]
0000000
6
SUB
1 = invert
Table 45 Phase



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