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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MB9BF412RPMC-G-JNE2 데이터시트(PDF) 75 Page - Cypress Semiconductor |
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MB9BF412RPMC-G-JNE2 데이터시트(HTML) 75 Page - Cypress Semiconductor |
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75 / 112 page  Document Number: 002-05615 Rev. *D Page 75 of 112 MB9B410R Series Multiplexed Bus Access Asynchronous SRAM Mode (VCC = 2.7V to 5.5V, VSS = 0V, TA = - 40°C to + 85°C) Parameter Symbol Pin name Conditions Value Unit Min Max Multiplexed address delay time tALE-CHMADV MALE MADATA[15:0] VCC ≥ 4.5 V 0 10 ns VCC < 4.5 V 20 Multiplexed address hold time tCHMADH VCC ≥ 4.5 V MCLK×n+0 MCLK×n+10 ns VCC < 4.5 V MCLK×n+0 MCLK×n+20 Note: − When the external load capacitance = 30 pF. (m = 0 to 15, n = 1 to 16) MCLK MCSX[7:0] MALE MOEX MWEX MADATA[15:0] MAD [24:0] MDQM [1:0] |
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