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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MB9BF412RPMC-G-JNE2 데이터시트(PDF) 80 Page - Cypress Semiconductor |
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MB9BF412RPMC-G-JNE2 데이터시트(HTML) 80 Page - Cypress Semiconductor |
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80 / 112 page  Document Number: 002-05615 Rev. *D Page 80 of 112 MB9B410R Series 12.4.9 Base Timer Input Timing Timer input timing (VCC = 2.7V to 5.5V, VSS = 0V, TA = - 40°C to + 85°C) Parameter Symbol Pin name Conditions Value Unit Remarks Min Max Input pulse width tTIWH tTIWL TIOAn/TIOBn (when using as ECK, TIN) - 2tCYCP - ns Trigger input timing (VCC = 2.7V to 5.5V, VSS = 0V, TA = - 40°C to + 85°C) Parameter Symbol Pin name Conditions Value Unit Remarks Min Max Input pulse width tTRGH tTRGL TIOAn/TIOBn (when using as TGIN) - 2tCYCP - ns Note: − tCYCP indicates the APB bus clock cycle time. About the APB bus number which Base Timer is connected to, see 8 Block Diagram in this data sheet. tTIWH VIHS VIHS VILS VILS tTIWL tTRGH VIHS VIHS VILS VILS tTRGL ECK TIN TGIN |
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