5228-DS09-405-R datasheet(45/100 Pages) BOARDCOM

45 / 100 page

Data Sheet

BCM5228

7/12/04

Broa d c om Co rp o r a t i o n

Document

5228-DS09-405-R

Parallel LED Mode

Page 33

PARALLEL LED MODE

The BCM5228U offers a parallel LED mode that is active all the time. There are 3 LED pins, LED1, LED2, and LED3 for

each port each of which can be individually configured to output one of many LED signals. Configuration can be

accomplished either by hardware or programming MII register bits. LED1 pins are shared with TXER. These pins can be

configured to output LED1 if TXER_EN pin is pulled low during power-on reset.

For unmanaged system design using the BCM5228U, the parallel LED pins for each port can be programmed through

hardware during power-on reset by pull-down or pull-up combinations of TXER/LED1 [1:8] pins. Pull-up and pull-down of

these pins should be done using a series 4.7-k

Ω resistor to OVDD or OGND respectively and LED drive and polarity should

be such that the active low output on LED1 lights up the LED. LED2 and LED3 can be configured to output one of Link,

Speed, Activity, Full-duplex, Transmit, Receive, Interrupt or Collision while LED3 can be configured to be one of Activity,

Full-duplex, Link or Speed. Software configuration of LED1, LED2 and LED3 is accomplished through MII shadow register

1Ah, Phy 1, bits [7:0]. For details, see Table 13, Table 14, and Table 15. Because LED2{1:8} pins are open drain, they can

be wire 0Red together and configured (by hardware during power-on reset or through software by setting bits in the MII

shadow register) to provide global hardware interrupt when required.

Table 13: Parallel LED Mode LED1 Selection

TXER[3:1]

MII Shadow Registera 1Ah, PHY 1, Bits [2:0]

a. The MII Shadow register is accessed by setting MII register 1Fh bit 7 to 1.

Value

LED1 Selection

POWER-ON

LED1 SELECT

BITS[2:0]

LED1 SELECT[2:0]

0Link

Speed

Activity

Full-duplex

4Transmit

Receive

Interrupt

7Collision

Table 14: Parallel LED Mode LED2 Selection

TXER [6:4]

MII Shadow Registera 1Ah, PHY 1, Bits [5:3]

a. The MII Shadow register is accessed by setting MII register 1Fh bit 7 to 1.

Value

LED2 Selection

POWER-ON

RESET LED2

SELECT[2:0]

LED2 SELECT[2:0]

Speed

Activity

Full-duplex

3Transmit

Receive

Interrupt

Collision

7Link

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