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5228-DS09-405-R 데이터시트(PDF) 82 Page - Broadcom Corporation.

부품명 5228-DS09-405-R
상세설명  10/100BASE-TX/FX Octal Transceiver
PDF  100 Pages
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제조업체  BOARDCOM [Broadcom Corporation.]
홈페이지  http://www.broadcom.com
Logo BOARDCOM - Broadcom Corporation.

5228-DS09-405-R 데이터시트(HTML) 82 Page - Broadcom Corporation.

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BCM5228
Data Sheet
7/12/04
Broa d c om Co rp o r a t i o n
Page 70
Timing and AC Characteristics
Document
5228-DS09-405-R
Se ction 7: Timing an d AC Char acte r istics
All digital output timing is specified at CL = 30 pF.
Output rise/fall times are measured between 10% and 90% of the output signal swing. Input rise/fall times are measured
between VIL maximum and VIH minimum. Output signal transitions are referenced to the midpoint of the output signal swing.
Input signal transitions are referenced to the midpoint between VIL maximum and VIH minimum.
Figure 5: Clock and Reset Timing
Table 49: Clock Timing
Parameter
Symbol
Min
Typ
Max
Unit
REF_CLK cycle time (50-MHz operation)
CK_CYCLE
–
20
–
ns
REF_CLK cycle time (125-MHz operation)
CK_CYCLE
–
8
–
ns
REF_CLK high/low time (50-MHz operation)
CK_HI
CK_LO
710
13
ns
REF_CLK high/low time (125-MHz operation)
CK_HI
CK_LO
–4
–
ns
REF_CLK rise/fall time (50-MHz operation)
CK_EDGE
–
–
2
ns
REF_CLK rise/fall time (125-MHz operation)
CK_EDGE
–
–
1
ns
Table 50: Reset Timing
Parameter
Symbol
Min
Typ
Max
Unit
Reset pulse length with stable REF_CLK input
RESET_LEN
2
–
–
µs
Activity after end of reset
RESET_WAIT
100
–
–
µs
RESET rise/fall time
RESET_EDGE
–
–
10
ns
REF_CLK
RESET#
Normal PHY
begin here
RESET_LEN
RESET_WAIT
CK_HI
CK_CYCLE
CK_EDGE
CK_LO
CK_EDGE
activity can
RESET_EDGE
RESET_EDGE



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