5228-DS09-405-R datasheet(80/100 Pages) BOARDCOM

80 / 100 page

BCM5228

Data Sheet

7/12/04

Broa d c om Co rp o r a t i o n

Page 68

Auxiliary Mode 3 Register (Shadow Register)

Document

5228-DS09-405-R

AUXILIARY MODE 3 REGISTER (SHADOW REGISTER)

FIFO Size Select[3:0]. The BCM5228 indicates the current selection of receive FIFO size using bit 3 through 0, as shown

in Table 47. The size can also be determined by the Extended FIFO Enable bit (register 10h, bit 2) and the Jumbo Packet

FIFO Enable bit (register 1Bh, bit 9) for backward compatibility with the 0.35-micron products.

Table 46: Auxiliary Mode 3 Register (Shadow Register 29d, 1Dh)

BIt

Name

R/W

Description

Default

15:9

Reserveda

a. Preserve existing values of reserved bits by completing a “Read/Modify Write.”

––

Reserveda

––

Reserveda

––

Reserveda

––

5:4

Reserveda

––

3:0

FIFO Size Select [3:0]

R/W

Currently-selected receive FIFO size

Note: R/W = Read/Write, RO = Read Only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear

after read operation. MII Shadow register bank 1 is accessed by setting MII register 1Fh bit 7 to a 1.

Table 47: Current Receive FIFO Size

FIFO Size Select[3:0]

Receive Fifo size in Use

(# of bits)

0000

0001

0010

0011

0100

0101

0110

0111

1000

1001

1010

1011

1100

1101

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