SSD1963QL9R datasheet(13/93 Pages) ETC2

13 / 93 page

SSD1963

Rev 1.1

P 13/93

Jan 2010

Solomon Systech

PIN DESCRIPTIONS

Key:

I = Input

O =Output

IO = Bi-directional (input/output)

P = Power pin

Hi-Z = High impedance

Table 6-1: MCU Interface Pin Mapping

Pin Name

Type

Reference

Voltage

Level

TFBGA

Pin #

LQFP

Pin #

Description

CLK

VDDIO

TTL clock input. This pin should be tied to VSS if

TTL clock input is not used

XTAL_IN

Crystal oscillator input. This pin should be tied to

VSS if not used

XTAL_OUT

Crystal oscillator output. This pin should be floating

if not used

CS#

VDDIO

123

Chip select

D/C#

VDDIO

122

Data/Command select

E(RD#)

VDDIO

121

6800 mode: E (enable signal)

8080 mode: RD# (read strobe signal)

R/W#(WR#)

VDDIO

120

6800 mode: R/W#

0: Write cycle

1: Read cycle

8080 mode: WR# (write strobe signal)

D[23:0]

VDDIO

E8, F4, F8,

G1, G2, G3,

G4, G5, G6,

G8, G9, H1,

H2, H3, H4,

H5, H6, H9,

J1, J2,J3, J4,

J5, J6

7, 8, 9, 10,

11, 87, 88,

89, 90, 91,

92, 98, 99,

103, 104,

105, 106,

107, 111,

112, 113,

114, 115, 116

Data bus. Pins not used should be floating

VDDLCD

Tearing effect

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