전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

SSD1963QL9R 데이터시트(PDF) 45 Page - List of Unclassifed Manufacturers

부품명 SSD1963QL9R
상세설명  1215KB Embedded Display SRAM LCD Display Controller
PDF  93 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  ETC2 [List of Unclassifed Manufacturers]
홈페이지  
Logo ETC2 - List of Unclassifed Manufacturers

SSD1963QL9R 데이터시트(HTML) 45 Page - List of Unclassifed Manufacturers

Back Button SSD1963QL9R Datasheet HTML 41Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 42Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 43Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 44Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 45Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 46Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 47Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 48Page - List of Unclassifed Manufacturers SSD1963QL9R Datasheet HTML 49Page - List of Unclassifed Manufacturers Next Button
Zoom Inzoom in Zoom Outzoom out
 45 / 93 page
background image
SSD1963
Rev 1.1
P 45/93
Jan 2010
Solomon Systech
A[5]
A[4]
A[3]
TFT FRC
TFT dithering
0
0
X
Disable
Disable
0
1
0
Disable
Enable
0
1
1
Enable
Disable
1
X
X
Disable
Disable
A[2] : LSHIFT polarity (POR = 0)
Set the dot clock pulse polarity.
0
Data latch in falling edge
1
Data latch in rising edge
A[1] : LLINE polarity (POR = 0)
Set the horizontal sync pulse polarity.
0
Active low
1
Active high
A[0] : LFRAME polarity (POR = 0)
Set the vertical sync pulse polarity.
0
Active low
1
Active high
B[6:5] : TFT type (POR = 01)
00, 01
TFT mode
10
Serial RGB mode
11
Serial RGB+dummy mode
HDP [10:8] : High byte of the horizontal panel size (POR = 010)
HDP [7:0] : Low byte of the horizontal panel size (POR = 01111111)
Horizontal panel size = (HDP + 1) pixels
VDP [10:8] : High byte of the vertical panel size (POR = 001)
VDP [7:0] : Low byte of the vertical panel size (POR = 11011111)
Vertical panel size = (VDP + 1) lines
G[5:3] : Even line RGB sequence for serial TFT interface (POR = 000)
000
RGB
001
RBG
010
GRB
011
GBR
100
BRG
101
BGR
11x
Reserved
G[2:0] : Odd line RGB sequence for serial TFT interface (POR = 000)
000
RGB
001
RBG
010
GRB
011
GBR
100
BRG
101
BGR
11x
Reserved



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com