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AM79C978AVCW 데이터시트(PDF) 35 Page - Advanced Micro Devices

부품명 AM79C978AVCW
상세설명  Single-Chip 1/10 Mbps PCI Home Networking Controller
PDF  256 Pages
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제조업체  AMD [Advanced Micro Devices]
홈페이지  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C978AVCW 데이터시트(HTML) 35 Page - Advanced Micro Devices

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Am79C978A
35
Figure 6.
Slave Write Using Memory Command
Expansion ROM Transfers
The host must initialize the Expansion ROM Base Ad-
dress register at offset 30H in the PCI configuration
space with a valid address before enabling access to
the device. The Am79C978A controller will not react to
any access to the Expansion ROM until both MEMEN
(PCI Command register, bit 1) and ROMEN (PCI Ex-
pansion ROM Base Address register, bit 0) are set to 1.
After the Expansion ROM is enabled, the Am79C978A
controller will assert DEVSEL on all memory read ac-
cesses with an address between ROMBASE and
ROMBASE + 1M - 4. The Am79C978A controller
aliases all accesses to the Expansion ROM of the com-
mand types Memory Read Multiple and Memory Read
Line to the basic Memory Read command. Eight-bit,
16-bit, and 32-bit read transfers are supported.
Since setting MEMEN also enables memory mapped
access to the I/O resources, attention must be given the
PCI Memory Mapped I/O Base Address register before
enabling access to the Expansion ROM. The host must
set the PCI Memory Mapped I/O Base Address register
to a value that prevents the Am79C978A controller from
claiming any memory cycles not intended for it.
The Am79C978A controller will always read four bytes
for every host Expansion ROM read access. TRDY will
not be asserted until all four bytes are loaded into an in-
ternal scratch register. The cycle TRDY is asserted de-
pends on the programming of the Expansion ROM
interface timing. Figure 7 assumes that ROMTMG
(BCR18, bits 15-12) is at its default value.
Note: The Expansion ROM should be read only during
PCI configuration time for the PCI system.
When the host tries to write to the Expansion ROM, the
Am79C978A controller will claim the cycle by asserting
DEVSEL. TRDY will be asserted one clock cycle later.
The write operation will have no effect. Writes to the
Expansion ROM are done through the BCR30 Expan-
sion Bus Data Port. See the Expansion Bus Interface
section for more details.
During the boot procedure, the system will try to find an
Expansion ROM. A PCI system assumes that an Expan-
sion ROM is present when it reads the ROM signature
55H (byte 0) and AAH (byte 1).
Slave Cycle Termination
There are three scenarios besides normal completion
of a transaction where the Am79C978A controller is the
target of a slave cycle and it will terminate the access.
FRAME
CLK
AD
IRDY
TRDY
C/BE
DEVSEL
STOP
PAR
ADDR
0111
PAR
1
2345678
10
9
11
DATA
PAR
BE
22399A-9



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