| 전자부품 데이터시트 검색엔진 |
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SH7041A 데이터시트(PDF) 363 Page - Renesas Technology Corp |
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SH7041A 데이터시트(HTML) 363 Page - Renesas Technology Corp |
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363 / 923 page ![]() 325 Complementary PWM Mode: Three-phase complementary positive and negative PWM waveforms whose positive and negative phases do not overlap can be obtained using channels 3 and 4. When set for complementary PWM mode, TGR3A, TGR3B, TGR4A, and TGR4B become output compare registers. The TIOC3B, TIOC3D, TIOC4A, TIOC4B, TIOC4C, and TIOC4D pins also automatically become PWM output pins while TCNT3 and TCNT4 become up/down counters. 12.4.2 Basic Functions Always select MTU external pin set function using the pin function controller (PFC). Counter Operation: When a start bit (CST0–CST4) in the timer start register (TSTR) is set to 1, the corresponding timer counter (TCNT) starts counting. There are two counting modes: a free- running mode and a periodic mode. To select the counting operation (figure 12.7): 1.Set bits TPSC2–TPSC0 in the TCR to select the counter clock.At the same time, set bits CKEG1 and CKEG0 in the TCR to select the desired edge of the input clock. 2.To operate as a periodic counter, set the CCLR2–CCLR0 bits in the TCR to select TGR as a clearing source for the TCNT. 3.Set the TGR selected in step 2 as an output compare register using the timer I/O control register (TIOR). 4.Write the desired cycle value in the TGR selected in step 2. 5.Set the CST bit in the TSTR to 1 to start counting. |
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