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SH7041A 데이터시트(PDF) 676 Page - Renesas Technology Corp |
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SH7041A 데이터시트(HTML) 676 Page - Renesas Technology Corp |
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676 / 923 page ![]() 638 18.3.13 Port E I/O Register (PEIOR) The port E I/O register (PEIOR) is a 16-bit read/write register that selects input or output for the 16 port E pins. Bits PE15IOR–PE0IOR correspond to pins PE15/TIOC4D/DACK1/ IRQOUT– PE0/TIOC0A/ DREQ0. PEIOR is enabled when the port E pins function as general input/outputs (PE15–PE0) or TIOC pin of the MTU. For other functions, it is disabled. When the port E pin functions are as PE15–PE0, or TIOC pin of the MTU, a given pin in port E is an output pin if its corresponding PEIOR bit is set to 1, and an input pin if the bit is cleared to 0. PEIOR is initialized to H'0000 by external power-on reset; however, it is not initialized for manual resets, reset by WDT, standby mode, or sleep mode, so the previous data is maintained. Bit: 15 14 13 12 11 10 9 8 PE15 IOR PE14 IOR PE13 IOR PE12 IOR PE11 IOR PE10 IOR PE9 IOR PE8 IOR Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W Bit: 76 5 4 3 2 1 0 PE7 IOR PE6 IOR PE5 IOR PE4 IOR PE3 IOR PE2 IOR PE1 IOR PE0 IOR Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W 18.3.14 Port E Control Registers 1, 2 (PECR1 and PECR2) PECR1 and PECR2 are 16-bit read/write registers that select the functions of the sixteen multiplexed pins of port E. PECR1 selects the functions of the upper eight bit pins of port E; PECR2 selects the function of the lower eight bit pins of port E. Port E has a bus control signal ( AH) and DMAC control signals (DACK1, DACK0, DRAK1, DRAK0), but there are instances when the register settings that select these pin functions will be ignored, depending on the operation mode. Refer to table 18.2, Pin Arrangement by Mode, for details. PECR1 and PECR2 are both initialized to H'0000 by external power-on reset but are not initialized for manual resets, reset by WDT, standby mode, or sleep mode, so the previous data is maintained. |
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