| 전자부품 데이터시트 검색엔진 |
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SH7041A 데이터시트(PDF) 752 Page - Renesas Technology Corp |
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SH7041A 데이터시트(HTML) 752 Page - Renesas Technology Corp |
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752 / 923 page ![]() 714 • Sample one-block erase program The wait time set values (number of loops) are for the case where f = 28.7 MHz. For other frequencies, the set value is given by the following expression: Wait time (µS) × f (MHz) ÷ 4 The WDT overflow cycle set value is for the case where f = 28.7 MHz. For other frequencies, ensure that the overflow cycle is a minimum of 5.3 ms. Registers Used R5 (input): Memory block table pointer R7 (output): OK (normal) or NG (error) R0-3, 6, 8-9: Work registers FLMCR1 .EQU H’80 FLMCR2 .EQU H’81 EBR1 .EQU H’82 EBR2 .EQU H’83 Wait10u .EQU 72 Wait2u .EQU 14 Wait200u .EQU 1435 Wait5m .EQU 35875 Wait20u .EQU 144 Wait5u .EQU 36 WDT_TCSR .EQU H’FFFF8610 WDT_9m .EQU H’A57D SWESET .EQU B’01000000 ESUSET .EQU B’00100000 ESET .EQU B’00000010 ECLEAR .EQU B’11111101 ESUCLEAR .EQU B’11011111 EVSET .EQU B’00001000 EVCLEAR .EQU B’11110111 SWECLEAR .EQU B’10111111 MAXErase .EQU 60 ; FlashErase .EQU $ MOV.L #H’FFFF8500,R0 LDC R0,GBR ; Initialize GBR MOV.L #1,R2 |
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