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STM32F730V8 데이터시트(PDF) 113 Page - STMicroelectronics |
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STM32F730V8 데이터시트(HTML) 113 Page - STMicroelectronics |
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113 / 202 page ![]() DS12536 Rev 2 113/202 STM32F730x8 Electrical characteristics 185 APB2 (up to 108 MHz) TIM1 24.9 23.8 20 µA/MHz TIM8 24.5 23.7 20 USART1 12.4 11.6 10 USART6 12.3 11.7 10 ADC1(5) 6.3 5.8 4.9 ADC2(5) 6.3 5.6 4.9 ADC3(5) 6.4 5.8 5 SDMMC1 9.1 8.3 7.1 SDMMC2 7 7.2 6 SPI1/I2S1(3) 3.2 3.2 2.6 SPI4 2.9 2.9 2.2 SYSCFG 1 1 0.7 TIM9 9.9 9.1 7.8 TIM10 7 6.4 5.6 TIM11 7.2 6.8 5.7 SPI5 4.8 4.1 3.6 SAI1 5.6 4.9 4.2 SAI2 5.4 4.7 4 USB PHY HS Controller 8.3 7.9 6.7 1. When the I/O compensation cell is ON, IDD typical value increases by 0.22 mA. 2. The BusMatrix is automatically active when at least one master is ON. 3. To enable an I2S peripheral, first set the I2SMOD bit and then the I2SE bit in the SPI_I2SCFGR register. 4. When the DAC is ON and EN1/2 bits are set in DAC_CR register, add an additional power consumption of 0.75 mA per DAC channel for the analog part. 5. When the ADC is ON (ADON bit set in the ADC_CR2 register), add an additional power consumption of 1.73 mA per ADC for the analog part. Table 35. Peripheral current consumption (continued) Peripheral IDD(Typ)(1) Unit Scale 1 Scale 2 Scale 3 |
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