STM32WB50CG datasheet(107/119 Pages) STMICROELECTRONICS

107 / 119 page

DS13047 Rev 5

107/119

STM32WB50CG STM32WB30CE

Electrical characteristics

110

Table 82. SPI characteristics(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fSCK

1/tc(SCK)

SPI clock frequency

Master mode



2.0 < VDD < 3.6 V

MHz

Master transmitter mode



2.0 < VDD < 3.6 V

Slave receiver mode



2.0 < VDD < 3.6 V

Slave mode transmitter/full duplex



2.7 < VDD < 3.6 V

32(2)

Slave mode transmitter/full duplex



2.0 < VDD < 3.6 V

20.5(2)

tsu(NSS) NSS setup time

Slave mode, SPI prescaler = 2

4 x TPCLK

th(NSS) NSS hold time

Slave mode, SPI prescaler = 2

2 x TPCLK

tw(SCKH)

tw(SCKL)

SCK high and low time

Master mode

TPCLK - 1.5

TPCLK

TPCLK + 1

tsu(MI)

Data input setup time

Master mode

1.5

tsu(SI)

Slave mode

th(MI)

Data input hold time

Master mode

th(SI)

Slave mode

ta(SO)

Data output access time

Slave mode

tdis(SO) Data output disable time

tv(SO)

Data output valid time

Slave mode 2.7 < VDD < 3.6 V

14.5

15.5

Slave mode 2.0 < VDD < 3.6 V

15.5

tv(MO)

Master mode (after enable edge)

2.5

th(SO)

Data output hold time

Slave mode (after enable edge)

th(MO)

Master mode (after enable edge)

1. Guaranteed by characterization results.

2. Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI), which has to fit into SCK low

or high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a master

having tsu(MI) = 0 while Duty(SCK) = 50 %.

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