SH33F2801PSLASH032PR datasheet(57/407 Pages) SINOWEALTH

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SH33F2801

1 ~ 0

SW[1:0]

System clock switch

Set to ‘1’ or cleared by software to select the system clock source.

00: HSI as the system clock

01: HSE as the system clock

1x: PLL output as system clock

10.3.2

Clock Configuration Register (RCC_CFGR)

Offset Address: 0x0004

Reset Value:

0x0000 0000

b31

b30

b29

b28

b27

b26

b25

b24

b23

b22

b21

b20

b19

b18

b17

b16

Reserved

HSE

16M

PLL

XTP

PLL

SRC

PLLF[5:0]

b15

b14

b13

b12

b11

b10

PLLF[5:0]

PLLK[2:0]

Reserved

PPRE[2:0]

HPRE[2:0]

Bit

Symbol

Description

31 ~ 20

Reserved

HSEM

Crystal oscillator high frequency mode

0: Crystal oscillator high frequency mode is off

1: Crystal oscillator high frequency mode is on

PLLXTPRE

Pre-divider for PLL entry

After being divided by setting to ‘1’ or clearing by software, it is used as a PLL

input clock.

This bit can only be written when the PLL is turned off.

0: No pre-division

1: 2 frequency division

PLLSRC

PLL entry clock source

Set to ‘1’ or cleared by software to select the PLL input clock source.

This bit can only be written when the PLL is turned off.

0: HSI clock as PLL input clock

1: HSE clock as PLL input clock

17 ~ 12

PLLF[5:0]

PLL multiplication factor F

Determine the PLL multiplier parameter by software settings

This can be written only when the PLL is turned off.

000000: F=15

000001: F=16

000010: F=17

... ...

111101: F=76

111110: F=77

111111: F=78

SH33F2801P/032PR 데이터시트(PDF) 57 Page - SINOWEALTH Electronic Ltd

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