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SH33F2801P/032PR 데이터시트(PDF) 64 Page - SINOWEALTH Electronic Ltd |
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SH33F2801P/032PR 데이터시트(HTML) 64 Page - SINOWEALTH Electronic Ltd |
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64 / 407 page ![]() SH33F2801 64 10.3.8 AHB Peripheral Clock Enable Register (RCC_AHBENR) Offset Address: 0x0020 Reset Value: 0x0000 0000 b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16 Reserved - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 Reserved MAC PEN CRC EN SYS CFG EN MCM EN GPI OEN - RW RW RW RW RW 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Bit Symbol Description 31 ~ 5 Reserved - 4 MACPEN Math co-processor clock enable Set to ‘1’ or cleared by software 0: math co-processor clock is disabled 1: math co-processor clock is enabled 3 CRCEN CRC clock enable Set to ‘1’ or cleared by software 0: CRC clock is disabled 1: CRC clock is enabled 2 SYSCFGEN SYSCFG clock enable Set to ‘1’ or cleared by software 0: SYSCFG clock is disabled 1: SYSCFG clock is enabled Note: The one-time register in this module cannot be reset. 1 MCMEN MCM module external control clock enable Set to ‘1’ or cleared by software 0: MCM clock is disabled 1: MCM clock is enabled 0 GPIOEN GPIO configuration block clock enable Set to ‘1’ or cleared by software 0: GPIO block clock is disabled 1: GPIO block clock is enabled |
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