WM8770 datasheet(21/52 Pages) WOLFSON

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Production Data

WM8770

PD Rev 4.1 June 2005

In Master mode (MS=1) ADCLRC, DACLRC and BCLK are outputs from the WM8770 (Figure 13).

ADCLRC, DACLRC and BITCLK are generated by the WM8770. DIN1/2/3/4 are sampled by the

WM8770 on the rising edge of BCLK so the controller must output DAC data that changes on the

falling edge of BCLK. ADCDAT is output on DOUT and changes on the falling edge of BCLK. By

setting control bit BCLKINV the polarity of BCLK may be reversed so that DIN1/2/3/4 are sampled on

the falling edge of BCLK and DOUT changes on the rising edge of BCLK.

Figure 13 Master Mode

AUDIO INTERFACE FORMATS

Audio data is applied to the internal DAC filters, or output from the ADC filters, via the Digital Audio

Interface. 5 popular interface formats are supported:

•

Left Justified mode

•

Right Justified mode

•

2S mode

•

DSP Early mode

•

DSP Late mode

All 5 formats send the MSB first and support word lengths of 16, 20, 24 and 32 bits, with the

exception of 32 bit right justified mode, which is not supported.

In left justified, right justified and I

2S modes, the digital audio interface receives DAC data on the

DIN1/2/3/4 inputs and outputs ADC data on DOUT. Audio Data for each stereo channel is time

multiplexed with ADCLRC/DACLRC indicating whether the left or right channel is present.

ADCLRC/DACLRC is also used as a timing reference to indicate the beginning or end of the data

words.

In left justified, right justified and I

2S modes, the minimum number of BCLKs per DACLRC/ADCLRC

period is 2 times the selected word length. ADCLRC/DACLRC must be high for a minimum of word

length BCLKs and low for a minimum of word length BCLKs. Any mark to space ratio on

ADCLRC/DACLRC is acceptable provided the above requirements are met.

In DSP early or DSP late mode, all 8 DAC channels are time multiplexed onto DIN1. DACLRC is

used as a frame sync signal to identify the MSB of the first word. The minimum number of BCLKs

per DACLRC period is 8 times the selected word length. Any mark to space ratio is acceptable on

DACLRC provided the rising edge is correctly positioned. The ADC data may also be output in DSP

early or late modes, with ADCLRC used as a frame sync to identify the MSB of the first word. The

minimum number of BCLKs per ADCLRC period is 2 times the selected word length

BCLK

DOUT

ADCLRC

DIN1/2/3/4

DACLRC

WM8770

CODEC

DSP/

ENCODER/

DECODER

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