EB632 datasheet(42/112 Pages) FREESCALE

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Functional Differences Between MSC8101 (Mask 2K42A) and MSC8103 (Mask 2K87M), Rev. 2

Freescale Semiconductor

CPM

14.4.1 TC Layer Functionary

Figure 13 shows a block diagram of the SI blocks and TSA.The TSA also contains transmission convergence (TC)

layer hardware.

Note:

TC layer support for ATM (FCC2 only) with TC layer 1 supported through TDMA1 and TC layers 6–8

supported through TDMB2, TDMC2, and TDMD2, respectively.

For the FCC2 ATM UTOPIA 8, the SI supports the following:

•

Four TDM channels routed in hardware to a TC layer block

•

Protocol-specific overhead bits may be discarded or routed to other controllers by the SI

•

Performing ATM TC layer functions (according to ITU-T I.432)

•

Transmit (Tx) updates include:

— Cell HEC generation

— Payload scrambling using self synchronizing scrambler (programmable by the user)

— Coset generation (programmable by the user)

— Cell rate by inserting idle/unassigned cells

•

Receive (Rx) updates include:

— Cell delineation using bit by bit HEC checking and programmable ALPHA and DELTA parameters for the

Figure 13. SI Block Diagram

Time-Slot

Assigner (TSA)

TDMA, B, C, D

Pins

Strobes

Route

SI RAM

Tx/Rx

RAM

Control

Mode

TDMA, B, C, D

Command

Status

SMC1 SMC2 SCC1 SCC2

MII1/

MII2

MUX

To: SMC1 SMC2 SCC1 SCC2 SCC3 SCC4

FCC1 FCC2 FCC3

Multi-Channel

Peripheral Bus

Non-multiplexed Serial Interface (NMSI) Pins

Channel #

Controllers

Shadow

Clock

Route

RAM

Address

UTOPIA

CPM Mux

Note: The CPM multiplexer and the MCCs are not part of the SI.

MUX

(MCCs)

(See Chapters 22 and 33 for details.)

TC Layer Hardware

(FCC2 only)

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