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MPC5200 데이터시트(PDF) 23 Page - Freescale Semiconductor, Inc |
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MPC5200 데이터시트(HTML) 23 Page - Freescale Semiconductor, Inc |
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23 / 80 page ![]() Electrical and Thermal Characteristics MPC5200 Data Sheet, Rev. 4 Freescale Semiconductor 23 Figure 7. Timing Diagram—DDR SDRAM Memory Read Timing MEM_CLK Control Signals MDQ (Data) MA (Address) MEM_CLK MDQS (Data Strobe) NOTE: Control Signals signals are composed of RAS, CAS, MEM_WE, MEM_CS, MEM_CS1 and CLK_EN Active NOP READ NOP NOP NOP NOP NOP thold Row Column MBA (Bank Selects) tvalid thold tvalid thold tvalid tdata_valid_min tdata_valid_max Read Data tdata_sample_min tdata_sample_max Sample Window MDQ (Data) MDQS (Data Strobe) tdata_valid_min tdata_valid_max Read Data tdata_sample_min tdata_sample_max Sample Window Sample position A: data are sampled on the expected edge of MEM_CLK, the MDQS signal indicate the valid data Sample position A Sample position B Sample position B: data are sampled on a later edge of MEM_CLK, SDRAM controller is waiting for the vaild MDQS signal 0.5 * MEM_CLK |
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