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MPC5200 데이터시트(PDF) 26 Page - Freescale Semiconductor, Inc |
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MPC5200 데이터시트(HTML) 26 Page - Freescale Semiconductor, Inc |
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26 / 80 page ![]() MPC5200 Data Sheet, Rev. 4 Electrical and Thermal Characteristics Freescale Semiconductor 26 Figure 10. PCI CLK Waveform NOTES: 1. In general, all 66-MHz PCI components must work with any clock frequency up to 66 MHz. CLK requirements vary depending upon whether the clock frequency is above 33 MHz. 2. Rise and fall times are specified in terms of the edge rate measured in V/ns. This slew rate must be met across the minimum peak-to-peak portion of the clock waveform as shown in Figure 10. 3. The minimum clock period must not be violated for any single clock cycle, i.e., accounting for all system jitter. Table 22. PCI CLK Specifications Sym Description 66 MHz 33 MHz Units Notes SpecID Min Max Min Max Tcyc PCI CLK Cycle Time 15 30 30 ns 1,3 A6.1 Thigh PCI CLK High Time 6 11 ns A6.2 tlow PCI CLK Low Time 6 A6.3 - PCI CLK Slew Rate 1.5 4 1 4 V/ns 2 A6.4 Tcyc PCI CLK Tlow Thigh 0.4Vcc 0.4Vcc, p-to-p 0.3Vcc 0.5Vcc 0.6Vcc 0.2Vcc (minimum) |
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