 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
AMD-K6-2E/233AMZ 데이터시트(PDF) 67 Page - Advanced Micro Devices |
|
|
|||||||||||||||||||||||||||||
AMD-K6-2E/233AMZ 데이터시트(HTML) 67 Page - Advanced Micro Devices |
|
|
67 / 332 page  Chapter 3 Software Environment 49 22529B/0—January 2000 AMD-K6™-2E Processor Data Sheet Preliminary Information 3.4 Paging The AMD-K6-2E processor can physically address up to four Gbytes of memory. This memory can be segmented into pages. The size of these pages is determined by the operating system design and the values set up in the page directory entries (PDE) and page table entries (PTE). The processor can access both 4-Kbyte pages and 4-Mbyte pages, and the page sizes can be intermixed within a page directory. When the page size extension (PSE) bit in CR4 is set, the processor translates linear addresses using either the 4-Kbyte translation lookaside buffer (TLB) or the 4-Mbyte TLB, depending on the state of the page size (PS) bit in the page directory entry. Figures 42 and 43 show how 4-Kbyte and 4-Mbyte page translations work. Figure 42. 4-Kbyte Paging Mechanism Linear Address Page Directory Page Table 4-Kbyte Page Frame CR3 0 11 12 21 31 22 Page Directory Offset Page Table Offset Page Offset PDE PTE Physical Address |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
