DSPIC33F datasheet(59/80 Pages) MICROCHIP

59 / 80 page

Preliminary

DS70152D-page 59

dsPIC33F/PIC24H PROGRAMMING SPECIFICATION

TABLE 5-4:

SERIAL INSTRUCTION EXECUTION FOR BULK ERASING CODE MEMORY

5.6

Writing Code Memory

The procedure for writing code memory is similar to the

procedure for writing the Configuration registers,

except that 64 instruction words are programmed at a

time. To facilitate this operation, working registers,

W0:W5, are used as temporary holding registers for the

data to be programmed.

Table 5-5 shows the ICSP programming details, includ-

ing the serial pattern with the ICSP command code,

which must be transmitted Least Significant bit first

using the PGC and PGD pins (see Figure 5-2). In Step

1, the Reset vector is exited. In Step 2, the NVMCON

In Step 3, the 24-bit starting destination address for

programming is loaded into the TBLPAG register and

W7 register. The upper byte of the starting destination

address is stored in TBLPAG and the lower 16 bits of

the destination address are stored in W7.

To minimize the programming time, the same packed

instruction format that the programming executive uses

is utilized (Figure 4-4). In Step 4, four packed instruc-

tion words are stored in working registers, W0:W5,

using the MOV instruction and the read pointer, W6, is

initialized. The contents of W0:W5 holding the packed

instruction word data are shown in Figure 5-6. In Step

5, eight TBLWT instructions are used to copy the data

from W0:W5 to the write latches of code memory. Since

code memory is programmed 64 instruction words at a

time, Steps 4 and 5 are repeated 16 times to load all the

write latches (Step 6).

After the write latches are loaded, programming is

initiated by writing to the NVMCON register in Steps 7

and 8. In Step 9, the internal PC is reset to 0x200. This is

a precautionary measure to prevent the PC from incre-

menting into unimplemented memory when large

devices are being programmed. Lastly, in Step 10, Steps

3-9 are repeated until all of code memory is programmed.

FIGURE 5-6:

PACKED INSTRUCTION

WORDS IN W0:W5

Command

(Binary)

Data

(Hex)

Description

Step 1: Exit the Reset vector.

0000

000000

040200

000000

NOP

GOTO

0x200

NOP

Step 2: Set the NVMCON to erase all program memory.

0000

2404FA

883B0A

MOV

#0x404F, W10

MOV

W10, NVMCON

Step 3: Initiate the erase cycle.

0000

A8E761

000000

BSET

NVMCON, #WR

NOP

Step 4: Wait for Bulk Erase operation to complete and make sure WR bit is clear.

0000

0001

807600

887840

000000

<VISI>

Externally time ‘P11’ msec (see Section TABLE 8-1: “AC/DC

Characteristics and Timing Requirements”

) to allow suffi-

cient time for the Bulk Erase operation to complete.

MOV

NVMCON, W0

MOV

W0, VISI

NOP

Clock out contents of VISI register. Repeat until the WR bit

is clear.

LSW0

MSB1

MSB0

LSW1

LSW2

MSB3

MSB2

LSW3

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