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WM8804 데이터시트(PDF) 46 Page - Wolfson Microelectronics plc

부품명 WM8804
상세설명  1:1 Digital Interface Transceiver with PLL
PDF  66 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8804 데이터시트(HTML) 46 Page - Wolfson Microelectronics plc

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WM8804
Production Data
w
PD Rev 4.1 September 2007
46
RIGHT JUSTIFIED MODE
In Right Justified Mode, the LSB of DIN is sampled by the WM8804 on the rising edge of BCLK
preceding an LRCLK transition. The LSB of the output data (DOUT) changes on the falling edge of
BCLK preceding an LRCLK transition, and may be sampled on the next rising edge of BCLK. LRCLK
is high during the left samples and low during the right samples (Figure 19).
LEFT CHANNEL
RIGHT CHANNEL
LRCLK
BCLK
DIN / DOUT
1/fs
n
3
2
1
n-2 n-1
LSB
MSB
n
3
2
1
n-2 n-1
LSB
MSB
Figure 19 Right Justified Mode
I
2S MODE
In I2S Mode, the MSB of DIN is sampled by the WM8804 on the second rising edge of BCLK
following an LRCLK transition. The MSB of the output data changes on the first falling edge of BCLK
following an LRCLK transition, and may be sampled on the next rising edge of BCLK. LRCLK is low
during the left samples and high during the right samples (Figure 20).
LEFT CHANNEL
RIGHT CHANNEL
LRCLK
BCLK
DIN / DOUT
1/fs
n
3
2
1
n-2 n-1
LSB
MSB
n
3
2
1
n-2 n-1
LSB
MSB
1 BCLK
1 BCLK
Figure 20 I2S Mode



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