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UPSD3422 데이터시트(PDF) 65 Page - STMicroelectronics |
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UPSD3422 데이터시트(HTML) 65 Page - STMicroelectronics |
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65 / 293 page ![]() uPSD34xx Power saving modes 65/293 Table 24. MCU Module Port and Peripheral Status during Reduced Power Modes Note: 1 The Watchdog Timer is not active during Idle Mode. Other supervisor functions are active: LVD, external reset, JTAG Debug reset. Table 25. State of 8032 MCU Bus Signals during Power-down and Idle Modes Mode Ports 1, 3, 4 SPI, I2C, UART0,1 PCA, TIMER 0,1,2 USB ADC EXT INT0,1 SUPER- VISORY Idle Maintain Data Active Active Active Active Active Active(1) Power- down Maintain Data Disabled Disabled Disabled Disabled Disabled Disabled Mode ALE PSEN_ RD_ WR_ AD0-7 A8-15 Idle 0 1 1 1 FFh FFh Power-down 0 1 1 1 FFh FFh |
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