TMP93CS41 datasheet(129/248 Pages) TOSHIBA

129 / 248 page

TMP93CS40/TMP93CS41

2004-02-10

93CS40-127

Table 3.8.2 PWM Cycle

at fc

= 20 MHz, fs = 32.768 kHz

PWM cycle

− 1

Select System

Clock

<SYSCK>

Select

Prescaler Clock

<PRCK1:0>

Gear Value

<GEAR2:0>

φP1

φP4

φP16

φP1

φP4

φP16

φP1

φP4

φP16

1 (fs)

XXX

7.69 ms

30.8 ms

123 ms

15.5 ms

62.0 ms

248 ms

31.1 ms

125 ms

498 ms

000 (fc)

12.6

µs

50.4

µs

201.6

µs 25.4 µs

101.6

µs406.4 µs 51.0 µs

204.0

µs 816.0 µs

001 (fc/2)

25.2 µs

100.8 µs403.2 µs

50.8 µs

203.2 µs812.8 µs

102.0 µs

408.0 µs

1.63 ms

010 (fc/4)

50.4 µs

201.6 µs806.4 µs101.6 µs406.4 µs

1.63 ms

204.0 µs

816.0 µs

3.26 ms

011 (fc/8)

100.8

µs403.2 µs 1.61 ms

203.2

µs812.8 µs 3.25 ms

408.0

µs 1.63 ms

6.53 ms

0 (fc)

(fFPH)

100 (fc/16)

201.6 µs806.4 µs

3.23 ms

406.4 µs

1.63 ms

6.50 ms

816.0 µs

3.26 ms

13.06 ms

XXX

(Low frequency)

XXX

7.69 ms

30.8 ms

123 ms

15.5 ms

62.0 ms

248 ms

31.1 ms

125 ms

498 ms

XXX

(fc/16 clock)

XXX

201.6 µs806.4 µs

3.23 ms

406.4 µs

1.63 ms

6.50 ms

816.0 µs

3.26 ms

13.06 ms

XXX: Don’t care

(2) 8-bit timer mode

Both PWM timers can be used independently as 8-bit interval timers. Since both timers

operate in exactly the same way, PWM0 (timer 2) is used for the purposes of explanation.

1. Generating interrupts at a fixed interval

To generate timer 2 interrupt (INTT2) at a fixed interval using the PWM0 timer, first

stop PWM0, then set the operating mode, input clock, and interval in the P0MOD and

TREG2 registers. Next, enable INTT2 and start counting PWM0.

Example: To generate a timer 2 interrupt every 32

µs at fc = 20 MHz, set registers as

follows:

Clock condition

System clock:

High frequency (fc)

Clock gear:

1 (fc)

Prescaler clock: fFPH

TRUN

← − X − − − 0 − −

Stops PWM timer 0 and clears it.

P0MOD

← X 0 1 1 0 0 X X

Sets 8-bit timer mode and selects

φP1 (0.2 µs) and

compare interrupt.

TREG2

← 1 0 1 0 0 0 0 0

Sets A0H (

= 32 µs ÷ 0.2 µs) in the timer register.

INTEPW10

← − − − − 1 1 0 0

Enables INTT2 and sets interrupt level 4.

TRUN

← 1 X − − − 1 − −

Starts counting PWM0.

X: Don’t care,

−: No change

Select an input clock using Table 3.8.1.

Note: To generate interrupts in 8-bit timer mode, bit5 (Interrupt control bit <PWM0INT> of

P0MOD) must be set to 1.

TMP93CS41 데이터시트(PDF) 129 Page - Toshiba Semiconductor

TMP93CS41 데이터시트(HTML) 129 Page - Toshiba Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL