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TMP93CS41 데이터시트(PDF) 131 Page - Toshiba Semiconductor |
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TMP93CS41 데이터시트(HTML) 131 Page - Toshiba Semiconductor |
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131 / 248 page ![]() TMP93CS40/TMP93CS41 2004-02-10 93CS40-129 This mode is as shown in Figure 3.8.13 below. Figure 3.8.13 Block Diagram of 8-Bit Timer Mode Shift trigger φP1 φP4 φP16 P0MOD<T2CLK1:0> Clock control P0MOD<DB2EN> Selector A B TREG2 WR Register buffer 8-bit timer register (TREG2) 8-bit comparator (CP2) Internal data bus Match INTT2 P0MOD<PWM0INT> Interrupt control PFFCR<FF2TRG1:0> PFFCR<FF2C1:0> TO2 Timer flip-flop control 8-bit up counter (UC2) Clear S Register write |
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