| 전자부품 데이터시트 검색엔진 |
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TMP93CS41 데이터시트(PDF) 149 Page - Toshiba Semiconductor |
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TMP93CS41 데이터시트(HTML) 149 Page - Toshiba Semiconductor |
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149 / 248 page ![]() TMP93CS40/TMP93CS41 2004-02-10 93CS40-147 Figure 3.9.14 shows the block diagram of this mode. Figure 3.9.14 Block Diagram of 16-Bit PPG Mode (4) Application examples of the capture function It is possible to enable or disable the loading of up counter (UC4) values into the capture registers CAP1 and CAP2, the timer flip-flop TFF4 inversion due to match detection by comparators CP4 and CP5, and the output of the TFF4 status to the TO4 pin. Combined with the interrupt function, these options can be applied in many ways, for example: 1. One-shot pulse output from external trigger pulse 2. Frequency measurement 3. Pulse width measurement 4. Time difference measurement These four application examples are described in detail below. TREG4-WR Selector TI4 φT1 φT4 φT16 Match Selector 16-bit comparator Match 16-bit comparator 16-bit up counter UC4 Internal data bus TREG4 Register buffer 4 T45CR<DB4EN> Flip-flop (TFF4) Flip-flop (TFF5) TRUN<T4RUN> TO4 (PPG output) TREG5 TO5 Clear |
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