TMP93CS41 datasheet(150/248 Pages) TOSHIBA

150 / 248 page

TMP93CS40/TMP93CS41

2004-02-10

93CS40-148

1. One-shot pulse output from external trigger pulse

To program this application, set the up counter UC4 in free-running mode with the

internal input clock, input the external trigger pulse from the TI4 pin, and load the value of

the up counter into capture register CAP1 at the rising edge of the TI4 pin. Then set

T4MOD<CAP12M1:0>

= 01.

When the interrupt INT4 is generated at the rising edge of the TI4 input, set the CAP1

value (c) plus a delay time (d) to TREG4 (

= c + d), and set the above set value (c + d) plus a

one-shot pulse width (p) to TREG5 (

= c + d + p). When the interrupt INT4 occurs, the

T4FFCR<EQ5T4 and EQ4T4>register should be set so that the TFF4 inversion is enabled

only when the up counter value matches TREG4 or TREG5. When interrupt INTTR5

occurs, this inversion will be disabled.

Figure 3.9.15 One-shot Pulse Output (with delay)

+ d

Counter clock

(Internal clock)

TI4 pin input

(External trigger pulse)

Match with TREG4

Match with TREG5

Timer output pin TO4

Load the up counter value into capture

+ d + p

Set the counter in free-running mode.

INTTR5 occurrence

Enable

inversion

Disable inversion

caused by loading

of the up counter

value into CAP1.

Enable

inversion

Delay time

Pulse width

(d)

(p)

TMP93CS41 데이터시트(PDF) 150 Page - Toshiba Semiconductor

TMP93CS41 데이터시트(HTML) 150 Page - Toshiba Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL