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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TMP93CS44 데이터시트(PDF) 116 Page - Toshiba Semiconductor |
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TMP93CS44 데이터시트(HTML) 116 Page - Toshiba Semiconductor |
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116 / 224 page  TMP93CS44/S45 2004-02-10 93CS44-114 (3) 16-bit programmable pulse generation (PPG) output mode Square wave pulse can be generated at any frequency and duty by timer 4. The output pulse may be either low active or high active. The PPG mode is obtained by inversion of the timer flip-flop TFF4 that is to be enabled by the match of the up counter UC4 with the timer register TREG4 or TREG5 and to be output to TO4 (also used as P44). In this mode, the following conditions must be satisfied. (Set value of TREG4) < (Set value of TREG5) Figure 3.8.10 Programmable Pulse Generation (PPG) Output Waveforms When the double buffer of TREG4 is enabled in this mode, the value of register buffer 4 will be shifted in TREG4 at match with TREG5. This feature makes easy the handling of low duty waves. Figure 3.8.11 Operation of Register Buffer Match with TREG4 (Interrupt INTTR4) Match with TREG5 (Interrupt INTTR5) TO4 pin Q2 Q1 Match with TREG4 Q3 Q2 Up counter = Q1 Up counter = Q2 Shift into the TREG5 Write into the TREG4 TREG4 (Value to be compared) Register buffer Match with TREG5 |
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