TMP86CS49FG datasheet(89/252 Pages) TOSHIBA

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Page 75

TMP86CS49FG

7.2 Divider Output (DVO)

Approximately 50% duty pulse can be output using the divider output circuit, which is useful for piezoelectric

buzzer drive. Divider output is from DVO pin.

7.2.1 Configuration

Figure 7-3 Divider Output

7.2.2 Control

The Divider Output is controlled by the Time Base Timer Control Register.

Note: Selection of divider output frequency (DVOCK) must be made while divider output is disabled (DVOEN="0"). Also, in other

words, when changing the state of the divider output frequency from enabled (DVOEN="1") to disable(DVOEN="0"), do not

change the setting of the divider output frequency.

Time Base Timer Control Register

TBTCR

(0036H)

DVOEN

DVOCK

(DV7CK)

(TBTEN)

(TBTCK)

(Initial value: 0000 0000)

DVOEN

Divider output

enable / disable

0: Disable

1: Enable

R/W

DVOCK

Divider Output (DVO)

frequency selection: [Hz]

NORMAL1/2, IDLE1/2 Mode

SLOW1/2

SLEEP1/2

Mode

R/W

DV7CK = 0

DV7CK = 1

fc/213

fs/25

fc/212

fs/24

fc/211

fs/23

fc/210

fs/22

TBTCR

Output latch

Port output latch

MPX

DVOEN

TBTCR<DVOEN>

DVO pin output

DVOCK

Divider output control register

(a) configuration

(b) Timing chart

Data output

DVO pin

fc/213 or fs/25

fc/212 or fs/24

fc/211 or fs/23

fc/210 or fs/22

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