L99PM72PXP datasheet(79/128 Pages) STMICROELECTRONICS

79 / 128 page

L99PM72PXP

ST SPI

Doc ID 023553 Rev 3

79/128

6.1.5

Address mapping

The RAM memory area consists of 16 bit registers.

For the device information (ROM memory area) the eight most significant bits of the memory

cell are used. The remaining 8 are zero.

All unused RAM and ROM addresses are read as ‘0’.

Note:

The register definition for RAM address 00H is unused. A register value of all 0 must cause

the device to enter a Fail-Safe state (interpreted as ‘SDI stuck to GND’ failure).

Note:

ROM address 3FH is unused. An attempt to access this address must be recognized as a

communication error (‘SDI stuck to VCC’ failure) and must cause the device to enter a

Fail-Safe state.

6.1.6

Write operation

The write operation starts with a Command Byte followed by 2, data bytes. The number of

data bytes is specified in the <SPI-frame-ID>.

Write command format

Table 48.

Address mapping

RAM

Address

Description

Access

ROM

Address

Description

Access

3FH

R/W

3FH

Reserved

N/A

…

3EH

13H

Status Register 3

…Unused

N/A

12H

Status Register 2

11H

Status Register 1

……

…

06H

Control Register 6

R/W

05H

Control Register 5

R/W

04H

Control Register 4

R/W

03H

Control Register 3

R/W

03H

02H

Control Register 2

R/W

02H

01H

Control Register 1

R/W

01H

00H

Reserved

R/W

00H

Table 49.

Write command format: command byte

MSB

LSB

Op Code

Address

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