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TMS320DM647_0804 데이터시트(PDF) 118 Page - Texas Instruments |
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TMS320DM647_0804 데이터시트(HTML) 118 Page - Texas Instruments |
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118 / 182 page ![]() 6.11.3 Video Port (VP0, VP1, VP2, VP3, VP4) Electrical Data/Timing 6.11.3.1 VCLKIN Timing (Video Capture Mode) VPxCLKINx 2 3 1 4 4 TMS320DM647/TMS320DM648 Digital Media Processor SPRS372B – MAY 2007 – REVISED APRIL 2008 www.ti.com Table 6-48. Timing Requirements for Video Capture Mode for VPxCLKINx(1) (see Figure 6-28) -720 -900 NO. UNIT MIN MAX 1 tc(VKI) Cycle time, VPxCLKINx 12.5 ns 2 tw(VKIH) Pulse duration, VPxCLKINx high 5.4 ns 3 tw(VKIL) Pulse duration, VPxCLKINx low 5.4 ns 4 tt(VKI) Transition time, VPxCLKINx 3 ns (1) The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN. Figure 6-28. Video Port Capture VPxCLKINx TIming Peripheral Information and Electrical Specifications 118 Submit Documentation Feedback |
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