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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TMS320DM647_0804 데이터시트(PDF) 119 Page - Texas Instruments |
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TMS320DM647_0804 데이터시트(HTML) 119 Page - Texas Instruments |
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119 / 182 page  6.11.3.2 Video Data and Control Timing (Video Capture Mode) VPxCLKINx VPxD[19:0] (Input) VPxCTLx (Input) 1 2 3 4 TMS320DM647/TMS320DM648 Digital Media Processor www.ti.com SPRS372B – MAY 2007 – REVISED APRIL 2008 Table 6-49. Timing Requirements in Video Capture Mode for Video Data and Control Inputs (see Figure 6-29) -720 -900 NO. UNIT MIN MAX 1 tsu(VDATV-VKIH) Setup time, VPxDx valid before VPxCLKINx high 2.4 ns 2 th(VDATV-VKIH) Hold time, VPxDx valid after VPxCLKINx high 0.5 ns 3 tsu(VCTLV-VKIH) Setup time, VPxCTLx valid before VPxCLKINx high 2.4 ns 4 th(VCTLV-VKIH) Hold time, VPxCTLx valid after VPxCLKINx high 0.5 ns Figure 6-29. Video Port Capture Data and Control Input Timing Submit Documentation Feedback Peripheral Information and Electrical Specifications 119 |
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