CMV2000 datasheet(34/87 Pages) AMSOSRAM

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CMV2000

Functional description

Datasheet

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When several sensor registers need to be written, the timing above can be repeated with

SPI_EN remaining high all the time. See the Figure 22 for an example of 2 registers being

written in burst.

Figure 22: SPI write timing for 2 registers in burst

All registers should be updated during IDLE time. The sensor is not IDLE during a frame burst

(between start of integration of first frame and read-out of last pixel of last frame).

Registers 35-38, 40-69, 100-103 can be updated during IDLE or FOT. Registers 1-34 and 70-

71 can always be updated but it is recommended to update these during IDLE or FOT to

minimize image effects. Registers 78-79 can always be updated without disrupting the imaging

process.

7.2.8.2

SPI read

The timing to read data from the registers over the SPI interface can be found in Figure 23.

Figure 23: SPI read timing

To indicate a read action over the SPI interface, the control bit on the SPI_IN pin is made ‘0’.

The address of the register being read out is sent immediately after this control bit (MSB first).

After the LSB of the address bits, the data is launched on the SPI_OUT pin on the falling edge

of the SPI_CLK. This means that the data should be sampled by the receiving system on the

rising edge of the SPI_CLK. The data comes over the SPI_OUT with MSB first. When reading

out the temperature sensor over the SPI, addresses 126 and 127 should de read-out in burst

mode (keep SPI_EN high).

SPI_EN

SPI_IN

SPI_CLK

’1'

½ CLK

1 CLK

SPI_EN

SPI_IN

SPI_CLK

’0'

SPI_OUT

½ CLK

1 CLK

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