CMV2000 datasheet(22/87 Pages) AMSOSRAM

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CMV2000

Functional description

Datasheet

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7.1.3

LVDS block

The LVDS block converts the digital data coming from the column ADC into standard serial

LVDS data running at maximum 480 Mbps. The sensor has 18 LVDS output pairs:

•

16 Data channels

•

1 Control channel

•

1 Clock channel

The 16 data channels are used to transfer 10-bit or 12-bit data words from sensor to receiver.

The output clock channel transports a DDR clock, synchronous to the data on the other LVDS

channels. This clock can be used at the receiving end to sample the data. The data on the

control channel contains status information on the validity of the data on the data channels,

among other useful sensor status information. Details on the LVDS timing and format can be

found in chapter 7.3 of this document.

LVDS requires parallel termination at the receiver side. So, between LVDS_CLK_P (pin D1)

and LVDS_CLK_N (pin D2) should be an external 100Ω resistor. Also, all the LVDS outputs

should all be externally terminated at the receiver side. See the TIA/EIA-644A standard for

details.

7.1.4

Sequencer

The on-chip sequencer will generate all required control signals to operate the sensor from

only a few external control clocks. This sequencer can be activated and programmed through

the SPI interface. A detailed description of the SPI registers and sensor (sequencer)

programming can be found in chapter 7.3.1 of this document.

7.1.5

SPI interface

The SPI interface is used to load the sequencer registers with data. The data in these registers

are used by the sequencer while driving and reading out the image sensor. Features like

windowing, subsampling, gain and offset are programmed using this interface. The data in the

on-chip registers can also be read back for test and debug of the surrounding system. Chapter

7.2.2 contains more details on SPI programming and timing.

CMV2000 데이터시트(PDF) 22 Page - ams-OSRAM AG