PSD913F2 datasheet(19/94 Pages) STMICROELECTRONICS

19 / 94 page

Preliminary Information

PSD9XX Family

9.0

The

PSD9XX

Functional

Blocks

As shown in Figure 1, the PSD9XX consists of six major types of functional blocks:

t Memory Blocks

t PLD Blocks

t Bus Interface

t I/O Ports

t Power Management Unit

t JTAG Interface

The functions of each block are described in the following sections. Many of the blocks

perform multiple functions, and are user configurable.

9.1 Memory Blocks

The PSD9XX has the following memory blocks:

• The main Flash memory

• Secondary Flash memory

• SRAM.

The memory select signals for these blocks originate from the Decode PLD (DPLD) and

are user-defined in PSDsoft.

Table 8 summarizes which versions of the PSD9XX contain which memory blocks.

Main Flash

Secondary Flash Block

Device

Flash Size

Sector Size

Block Size

Sector Size

SRAM

PSD913F2

128KB

16KB

32KB

8KB

2KB

PSD934F2

256KB

32KB

8KB

PSD954F2

256KB

32KB

8KB

32KB

Table 8. Memory Blocks

9.1.1 Main Flash and Secondary Flash Memory Description

The main Flash memory block is divided evenly into eight sectors. The secondary Flash

memory is divided into four sectors of eight Kbytes each. Each sector of either memory

can be separately protected from program and erase operations.

Flash memory may be erased on a sector-by-sector basis and programmed byte-by-byte.

Flash sector erasure may be suspended while data is read from other sectors of memory

and then resumed after reading.

During a program or erase of Flash, the status can be output on the Rdy/Bsy pin of Port

C3. This pin is set up using PSDsoft.

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