| 전자부품 데이터시트 검색엔진 |
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H838532H 데이터시트(PDF) 58 Page - Renesas Technology Corp |
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H838532H 데이터시트(HTML) 58 Page - Renesas Technology Corp |
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58 / 508 page ![]() Section 2 CPU Rev. 1.00 May 30, 2008 Page 38 of 484 REJ09B0436-0100 Table 2.8 System Control Instructions Instruction Size* Function RTE Returns from an exception-handling routine. SLEEP Causes a transition to a power-down state. LDC B/W (EAs) → CCR Moves the source operand contents to the CCR. The CCR size is one byte, but in transfer from memory, data is read by word access. STC B/W CCR → (EAd) Transfers the CCR contents to a destination location. The condition code register size is one byte, but in transfer to memory, data is written by word access. ANDC B CCR ∧ #IMM → CCR Logically ANDs the CCR with immediate data. ORC B CCR ∨ #IMM → CCR Logically ORs the CCR with immediate data. XORC B CCR ⊕ #IMM → CCR Logically XORs the CCR with immediate data. NOP PC + 2 → PC Only increments the program counter. Note: * Refers to the operand size. B: Byte W: Word |
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