H838532H datasheet(68/508 Pages) RENESAS

부품명	H838532H

상세설명	16-Bit Single-Chip Microcomputer H8 Family / H8/300H Super Low Power Series

PDF	508 Pages

Scroll/Zoom	100%

제조업체	RENESAS [Renesas Technology Corp]

홈페이지	http://www.renesas.com

Logo

68 / 508 page

Section 2 CPU

Rev. 1.00 May 30, 2008 Page 48 of 484

REJ09B0436-0100

2.6.2

On-Chip Peripheral Modules

On-chip peripheral modules are accessed in two states or three states. The data bus width is 8 bits

or 16 bits depending on the register. For description on the data bus width and number of

accessing states of each register, refer to section 15.1, Register Addresses (Address Order).

Registers with 16-bit data bus width can be accessed by word size only. Registers with 8-bit data

bus width can be accessed by byte or word size. When a register with 8-bit data bus width is

accessed by word size, a bus cycle occurs twice. In two-state access, the operation timing is the

same as that for on-chip memory.

Figure 2.10 shows the operation timing in the case of three-state access to an on-chip peripheral

module.

T1 state

Bus cycle

Internal

address bus

Internal

read signal

Internal

data bus

(read access)

Internal

write signal

Read data

Address

Internal

data bus

(write access)

T2 state

T3 state

Write data

SUB

φ or φ

Figure 2.10 On-Chip Peripheral Module Access Cycle (3-State Access)

H838532H 데이터시트(PDF) 68 Page - Renesas Technology Corp