H838532H datasheet(94/508 Pages) RENESAS

부품명	H838532H

상세설명	16-Bit Single-Chip Microcomputer H8 Family / H8/300H Super Low Power Series

PDF	508 Pages

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제조업체	RENESAS [Renesas Technology Corp]

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Section 3 Exception Handling

Rev. 1.00 May 30, 2008 Page 74 of 484

REJ09B0436-0100

3.3.4

Internal Interrupts

There are 23 internal interrupts that can be requested by the on-chip peripheral modules. When a

peripheral module requests an interrupt, the corresponding bit in IRR1 or IRR2 is set to 1.

Recognition of individual interrupt requests can be disabled by clearing the corresponding bit in

IENR1 or IENR2. All these interrupts can be masked by setting the I bit to 1 in CCR. When

internal interrupt handling is initiated, the I bit is set to 1 in CCR. Vector numbers from 20 to 11

are assigned to these interrupts. Table 3.2 shows the order of priority of interrupts from on-chip

peripheral modules.

3.3.5

Interrupt Operations

Interrupts are controlled by an interrupt controller. Figure 3.2 shows a block diagram of the

interrupt controller. Figure 3.3 shows the flow up to interrupt acceptance.

Interrupt controller

Interrupt

request

CCR (CPU)

External or

internal

interrupts

External

interrupts or

internal

interrupt

enable

signals

Figure 3.2 Block Diagram of Interrupt Controller

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