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H838532H 데이터시트(PDF) 138 Page - Renesas Technology Corp |
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H838532H 데이터시트(HTML) 138 Page - Renesas Technology Corp |
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138 / 508 page ![]() Section 5 Power-Down Modes Rev. 1.00 May 30, 2008 Page 118 of 484 REJ09B0436-0100 5.9 Module Standby Mode 5.9.1 Setting Module Standby Mode Module standby mode is set for individual peripheral functions. All the on-chip peripheral modules can be placed in module standby mode. When a module enters module standby mode, the system clock supply to the module is stopped and operation of the module halts. This state is identical to standby mode. Module standby mode is set for a particular module by setting the corresponding bit to 0 in clock stop register 1 (CKSTPR1) or clock stop register 2 (CKSTPR2). (See table 5.5.) 5.9.2 Clearing Module Standby Mode Module standby mode is cleared for a particular module by setting the corresponding bit to 1 in clock stop register 1 (CKSTPR1) or clock stop register 2 (CKSTPR2). (See table 5.5.) Following a reset, clock stop register 1 (CKSTPR1) and clock stop register 2 (CKSTPR2) are both initialized to H'FF. |
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