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SH7052 데이터시트(PDF) 335 Page - Renesas Technology Corp

부품명 SH7052
상세설명  SuperHTM RISC engine
PDF  919 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
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SH7052 데이터시트(HTML) 335 Page - Renesas Technology Corp

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Down-Counters 8A to 8P (DCNT8A to DCNT8P): Down-counters 8A to 8P (DCNT8A to
DCNT8P) are 16-bit readable/writable registers that count on an input clock. The input clock is
selected with prescaler register 1 (PSCR1) and the timer control register (TCR).
Bit:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit name:
Initial value:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
When the one-shot pulse function is used, DCNT8x starts counting down when the corresponding
DSTR bit is set to 1 by the user program after the DCNT8x value has been set. When the DCNT8x
value underflows, DSTR and DCNT8x are automatically cleared to 0, and the count is stopped. At
the same time, the corresponding channel 8 timer status register 8 (TSR8) status flag is set to 1.
When the offset one-shot pulse function is used, on compare-match with a channel 1 or 2 general
register (GR) or output compare register (OCR) (the compare-match setting being made in the
trigger mode register (TRGMDR) (for channel 1 only) ) when the corresponding timer connection
register (TCNR) bit is 1, the corresponding down-count start register (DSTR) bit is automatically
set to 1 and the down-count is started. When the DCNT8x value underflows, the corresponding
DSTR bit and DCNT8x are automatically cleared to 0, the count is stopped, and the output is
inverted, or, if a one-shot terminate register (OTR) setting has been made to forcibly terminate
output by means of a trigger, DSTR is cleared to 0 by a channel 1 or 2 compare-match between
GR and OCR, the count is forcibly terminated, and the output is inverted. The output is inverted
for whichever is first. At the same time, the corresponding channel 8 TSR8 status flag is set to 1.
The DCNT8x counters can only be accessed by a word read or write.
The DCNT8x counters are initialized to H'0000 by a power-on reset, and in hardware standby
mode and software standby mode.
For details, see sections 10.3.5, One-Shot Pulse Function, and 10.3.6, Offset One-Shot Pulse
Function and Output Cutoff Function.
10.2.17
Event Counters (ECNT)
The event counters (ECNT) are 8-bit up-counters. The ATU-II has six ECNT counters in channel
9.
Channel
Abbreviation
Function
9
ECNT9A, ECNT9B,
ECNT9C, ECNT9D,
ECNT9E, ECNT9F
8-bit event counters



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