| 전자부품 데이터시트 검색엔진 |
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SH7052 데이터시트(PDF) 392 Page - Renesas Technology Corp |
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SH7052 데이터시트(HTML) 392 Page - Renesas Technology Corp |
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392 / 919 page ![]() 366 Clearing by DMAC: The interrupt status flag (ICF0A to ICF0D, CMF6A to CMF6D, CMF7A to CMF7D) is cleared automatically during data transfer when the DMAC is activated by input capture or compare-match. The procedure and timing in this case are shown in figure 10.43. Start Interrupt status flag cleared during data transfer CK Clear request signal from DMAC Interrupt status flag ICF0B, CMF6 Interrupt status flag clear signal Interrupt request signal Activate DMAC Figure 10.43 Procedure and Timing for Clearing by DMAC |
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