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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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7733 데이터시트(PDF) 347 Page - Renesas Technology Corp |
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7733 데이터시트(HTML) 347 Page - Renesas Technology Corp |
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347 / 940 page  CONNECTING EXTERNAL DEVICES 7733 Group User’s Manual 12–22 External data bus Data length 8 16 8,16 16 (When accessed starting from even address) No wait In use State when “L” level is input to pin HOLD External data bus width Software wait ALE E HLDA HOLD R/W Address A 1 ! 1 1 ! 1 Hold state Sampling timing Bus is in use. <<When “L” level is input to pin HOLD while bus is in use (1)>> When “L” level which is input to pin HOLD is accepted, the address which was output immediately before is output again, instead of a new address. External address bus/ External data bus External address bus Clock 1 Data Floating BHE Address A Floating Address B Bus is in use. Floating Fig. 12.4.3 Timing when hold state is accepted and terminated (2) 12.4 Hold function |
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