| 전자부품 데이터시트 검색엔진 |
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7733 데이터시트(PDF) 460 Page - Renesas Technology Corp |
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7733 데이터시트(HTML) 460 Page - Renesas Technology Corp |
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460 / 940 page ![]() APPLICATIONS 7733 Group User’s Manual 17–52 Fig. 17.4.6 Approximate flowchart (2) Notes 1: When pin VREF and resistor ladder network are connected, current flows into the resistor ladder network. When using the A-D converter after the wait mode is terminated, do as follows: q Reconnect pin VREF and resistor ladder network. And then, start A-D conversion after a period of 1 s or more passed. 2: When a port is connected to an external device and so on, there is a possibility that current consumption increases according to the port’s level. In order to avoid this problem, do as follows: •When output mode is selected: Fix the port’s level to a level where no current flows into the external. •When input mode is selected: Pull the port high or low via a resistor. (Floating state is disabled.) 3: Do not switch the system clock until oscillation of a clock which is input from the external is stabilized. Timer B2 interrupt routine Register save processing Clock count Register return processing RTI INT0 interrupt routine Register save processing [F_WIT] “0” Register return processing RTI [F_WIT]: Flag used to determine whether an INT0 interrupt request has occurred or not 17.4 Power saving w |
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