전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

CS8422-DNZ 데이터시트(PDF) 28 Page - Cirrus Logic

부품명 CS8422-DNZ
상세설명  24-bit, 192 kHz, Asynchronous Sample Rate Converter with
PDF  82 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS8422-DNZ 데이터시트(HTML) 28 Page - Cirrus Logic

Back Button CS8422-DNZ Datasheet HTML 24Page - Cirrus Logic CS8422-DNZ Datasheet HTML 25Page - Cirrus Logic CS8422-DNZ Datasheet HTML 26Page - Cirrus Logic CS8422-DNZ Datasheet HTML 27Page - Cirrus Logic CS8422-DNZ Datasheet HTML 28Page - Cirrus Logic CS8422-DNZ Datasheet HTML 29Page - Cirrus Logic CS8422-DNZ Datasheet HTML 30Page - Cirrus Logic CS8422-DNZ Datasheet HTML 31Page - Cirrus Logic CS8422-DNZ Datasheet HTML 32Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 28 / 82 page
background image
28
DS692PP1
CS8422
OLRCK
OSCLK
SDOUT/
TDM_IN
MSB
32 OSCLKs
SDOUT 4, ch A
32 OSCLKs
SDOUT 4, ch B
32 OSCLKs
SDOUT 3, ch A
32 OSCLKs
SDOUT 3, ch B
32 OSCLKs
SDOUT 2, ch A
32 OSCLKs
SDOUT 2, ch B
32 OSCLKs
SDOUT 1, ch A
32 OSCLKs
SDOUT 1, ch B
MSB
MSB
MSB
MSB
MSB
MSB
MSB
MSB
LSB
Data
Figure 13. TDM Master Mode Timing Diagram
OLRCK
OSCLK
SDOUT/
TDM_IN
MSB
32 OSCLKs
SDOUT 4, ch A
32 OSCLKs
SDOUT 4, ch B
32 OSCLKs
SDOUT 3, ch A
32 OSCLKs
SDOUT 3, ch B
32 OSCLKs
SDOUT 2, ch A
32 OSCLKs
SDOUT 2, ch B
32 OSCLKs
SDOUT 1, ch A
32 OSCLKs
SDOUT 1, ch B
MSB
MSB
MSB
MSB
MSB
MSB
MSB
MSB
LSB
Data
Figure 14. TDM Slave Mode Timing Diagram
ILRCK
ISCLK
SDIN
OLRCK
OSCLK
SDOUT
TDM_IN
OLRCK
OSCLK
SDOUT
TDM_IN
ILRCK
ISCLK
SDIN
OLRCK
OSCLK
SDOUT
PCM Source 2
OLRCK
OSCLK
SDOUT
PCM Source 1
CS84221
Slave
CS84222
Slave
LRCK
SCLK
SDIN
DSP
Master
OLRCK
OSCLK
SDOUT
TDM_IN
ILRCK
ISCLK
SDIN
CS84223
Slave
OLRCK
OSCLK
SDOUT
TDM_IN
ILRCK
ISCLK
SDIN
CS84224
Slave
OLRCK
OSCLK
SDOUT
PCM Source 3
OLRCK
OSCLK
SDOUT
PCM Source 4
Figure 15. TDM Mode Configuration (All CS8422 outputs are slave)
ILRCK
ISCLK
SDIN
OLRCK
OSCLK
SDOUT
TDM_IN
CS84221
OLRCK
OSCLK
SDOUT
PCM Source 2
OLRCK
OSCLK
SDOUT
PCM Source 1
Master
LRCK
SCLK
SDIN
DSP
Slave
OLRCK
OSCLK
SDOUT
TDM_IN
ILRCK
ISCLK
SDIN
CS84224
Slave
OLRCK
OSCLK
SDOUT
TDM_IN
ILRCK
ISCLK
SDIN
CS84222
Slave
OLRCK
OSCLK
SDOUT
TDM_IN
ILRCK
ISCLK
SDIN
CS84223
Slave
OLRCK
OSCLK
SDOUT
PCM Source 3
OLRCK
OSCLK
SDOUT
PCM Source 4
Figure 16. TDM Mode Configuration (First CS8422 output is master, all others are slave)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com