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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MPC8308VMAGDA 데이터시트(PDF) 30 Page - Freescale Semiconductor, Inc |
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MPC8308VMAGDA 데이터시트(HTML) 30 Page - Freescale Semiconductor, Inc |
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30 / 88 page  MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 0 30 Freescale Semiconductor High-Speed Serial Interfaces (HSSI) Figure 21 shows the SerDes reference clock connection reference circuits for LVDS type clock driver. Since LVDS clock driver’s common mode voltage is higher than the MPC8308’s SerDes reference clock input’s allowed range (100 to 400 mV), AC-coupled connection scheme must be used. It assumes the LVDS output driver features 50- Ω termination resistor. It also assumes that the LVDS transmitter establishes its own common mode level without relying on the receiver or other external component. Figure 21. AC-Coupled Differential Connection with LVDS Clock Driver (Reference Only) 50 Ω 50 Ω SD_REF_CLK SD_REF_CLK Clock Driver 100 Ω differential PWB trace SerDes Refer. CLK Receiver Clock Driver CLK_Out CLK_Out LVDS CLK Driver Chip 10 nF 10 nF MPC8308 |
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