MPC8308VMAGDA datasheet(48/88 Pages) FREESCALE

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MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 0

Freescale Semiconductor

Enhanced Secure Digital Host Controller (eSDHC)

13.2

eSDHC AC Timing Specifications (Full Speed Mode)

This section describes the AC electrical specifications for the eSDHC (SD/MMC) interface of the device.

Table 39 provides the eSDHC AC timing specifications for full speed mode as defined in Figure 35 and

Figure 36.

Output low voltage

VOL

IOL = 3.2 mA

—

0.4

Input high voltage

VIH

—2.1

NVDD +0.3

Input low voltage

VIL

—–0.3

0.8

Table 39. eSDHC AC Timing Specifications for Full Speed Mode

At recommended operating conditions NVDD = 3.3 V ± 300 mV.

Parameter

Symbol 1

Min

Max

Unit

Notes

SD_CLK clock frequency—full speed mode

fSFSCK

025

MHz

—

SD_CLK clock cycle

tSFSCK

—

SD_CLK clock frequency—identification mode

fSIDCK

0400

kHz

—

SD_CLK clock low time

tSFSCKL

—

SD_CLK clock high time

tSFSCKH

—

SD_CLK clock rise and fall times

tSFSCKR/

tSFSCKF

—5

Input setup times: SD_CMD, SD_DATx to SD_CLK

tSFSIVKH

3—

Input hold times: SD_CMD, SD_DATx to SD_CLK

tSFSIXKH

2—

Output valid: SD_CLK to SD_CMD, SD_DATx valid

tSFSKHOV

—3

Output hold: SD_CLK to SD_CMD, SD_DATx valid

tSFSKHOX

–3

—

SD card input setup

tISU

5—

SD card input hold

tIH

5—

SD card output valid

tODLY

—14

SD card output hold

tOH

0—

Note:

1 The symbols used for timing specifications herein follow the pattern of t

(first three letters of functional block)(signal)(state) (reference)(state)

for inputs and t(first three letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tSFSIXKH symbolizes eSDHC

full mode speed device timing (SFS) input (I) to go invalid (X) with respect to the clock reference (K) going to high (H). Also

tSFSKHOV symbolizes eSDHC full speed timing (SFS) for the clock reference (K) to go high (H), with respect to the output (O)

going valid (V) or data output valid time. Note that, in general, the clock reference symbol representation is based on five letters

representing the clock of a particular functional. For rise and fall times, the latter convention is used with the appropriate letter:

R (rise) or F (fall).

2 Measured at capacitive load of 40 pF.

3 For reference only, according to the SD card specifications.

4 Average, for reference only.

Table 38. eSDHC interface DC Electrical Characteristics (continued)

Characteristic

Symbol

Condition

Min

Max

Unit

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