HCS12 datasheet(222/452 Pages) FREESCALE

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Instruction Glossary

S12CPUV2 Reference Manual, Rev. 4.0

222

Freescale Semiconductor

Operation:

Effective Address

⇒ Y

Description:

Loads index register Y with an effective address specified by the program.

The effective address can be any indexed addressing mode operand

address except an indirect address. Indexed addressing mode operand

addresses are formed by adding an optional constant supplied by the

program or an accumulator value to the current value in X, Y, SP, or PC.

See 3.9 Indexed Addressing Modes for more details.

Operation is a bit more complex when LEAY is used with auto-increment or

auto-decrement operand specifications and index register Y is the

referenced index register. The index register is loaded with what would have

gone out to the address bus in the case of a load indexed instruction. In the

case of a pre-increment or pre-decrement, the modification is made before

the index register is loaded. In the case of a post-increment or

post-decrement, modification would have taken effect after the address

went out on the address bus, so post-modification does not affect the

content of the index register.

In the unusual case where LEAY involves two different index registers and

post-increment and post-decrement, both index registers are modified as

demonstrated by the following example. Consider the instruction LEAY

4,X+. First Y is loaded with the value of X, then X is incremented by 4.

LEAY

Load Y with Effective Address

LEAY

CCR Details:

HIN

––––––––

Source Form

Address

Mode

Object Code

Access Detail

HCS12

M68HC12

LEAY oprx0_xysp

LEAY oprx9,xysp

LEAY oprx16,xysp

IDX

IDX1

IDX2

19 xb

19 xb ff

19 xb ee ff

(1)

1. Due to internal M68HC12 CPU requirements, the program word fetch is performed twice to the same address during this

instruction.

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